SPECIAL SESSION ON "Architecture and Hardware for Security Applications (AHSA)"

SPECIAL SESSION SCOPE

The scope of this special session is on all views of hardware-oriented security. The session gives a very good opportunity to present new results from both the research and industry communities. Of special interests are contributions that describe new methods for secure and efficient hardware implementations for embedded systems, hardware Trojans – insertion/detection methodologies, side channel analysis etc.

TOPICS OF INTEREST INCLUDE (BUT ARE NOT LIMITED TO)

• Security of Cyber-Physical Systems
• Security architectures in Embedded Systems
• Privacy in Embedded Systems
• All types of attacks against hardware implementations and countermeasures
• Hardware Trojans and detection techniques
• IC Trust and anti-Counterfeiting
• Hardware security primitives: PUFs and TRNGs
• Security architectures for pervasive computing and wireless applications/protocols
• Trusted computing platform
• Secure system-on-chip (SoC) designs
• Lightweight implementations
• Vehicular security hardware implementations
• Methodologies for hardware security validation. Tools for security validation
• Applications of secure hardware
• Hardware architectures for cryptanalysis
• Efficient hardware architectures for symmetric and asymmetric cryptographic algorithms
• Public key cryptography in area constrained environments
• Processors for smart card security
• Reconfigurable devices for secure functions

SUBMISSION GUIDELINES

Authors are encouraged to submit their manuscripts to the Easychair System. Should an unexpected web access problem be encountered, please contact the Program Chair.

Each manuscript should include the complete paper text, all illustrations, and references. The manuscript should conform to the IEEE format: single-spaced, double column, US letter page size, 10-point size Times Roman font, up to 8 pages. In order to conduct a blind review, no indication of the authors' names should appear in the manuscript, references included.

Conference Publishing Services (CPS) will publish accepted papers in the conference proceedings and the proceedings will be submitted to the IEEE Xplore Digital library and indexing services. Extended versions of selected best papers will be published in a special issue of the ISI indexed “Microprocessors and Microsystems: Embedded Hardware Design” Elsevier journal.

IMPORTANT DATES

• Paper Submission: April 8th 2016 Extended to April 24th
• Notification of Acceptance: May 30th 2016 Extended to June13th
• Camera-ready Paper Due: June 27th 2016 Extended to July 1st

SPECIAL SESSION CHAIR(S)

Paris Kitsos (TEI West. Greece, GR)
Martin Novotny (Czech Technical University in Prague, Czech Republic)

SPECIAL SESSION PROGRAM COMMITTEE

-Giovanni Agosta, Politecnico di Milano, Italy
-Rajat Subhra Chakraborty, Indian Inst. of Tech. Kharagpur, India
-Claudia Feregrino-Uribe, INAOE, Mexico
-Sylvain Guilley, TELECOM-ParisTech, France
-Odysseas Koufopavlou, University of Patras, Greece
-Francesco Leporati, University of Pavia, Italy
-Amir Moradi, Ruhr University Bochum, Germany
-Martin Novotny, Czech Technical University in Prague, Czech Republic
-Thomas Plos, NXP Semiconductors, Austria
-Miguel Morales-Sandoval, CINVESTAV-LTI, Mexico
-Fabrizio De Santis, Technische Universität München, Germany
-Nicolas Sklavos, University of Patras, Greece
-Sergei Skorobogatov, University of Cambridge, UK
-Yannick Teglia, STMicroelectronics, France
-Steve Trimberger, Xilinx, USA
-Artemios G. Voyiatzis, SBA Research, Austria
-Dai Yamamoto, Fujitsu Laboratories Ltd, Japan
-Nogami Yasuyuki, Okayama University, Japan


CONTACT INFORMATION
Dr. Paris Kitsos
Digital IC Design and Systems laboratory (DICES lab)
Computer & Informatics Engineering Department Technological Educational Institute of Western Greece Antirrion, GR-30020, Greece
webpage

Dr.-Ing. Martin Novotny
Department of Digital Design
Faculty of Information Technology
Czech Technical University in Prague
Prague, 160 00, Czech Republic
webpage